FIG. 1 shows a well-known three phase power inverter 100 for converting a DC power supply 101 to an AC output 103 which may then be connected to a load (not shown). The inverter comprises three separate phases 200, 300, 400 (also referred to as phases U, V, W respectively). Each phase includes two switches in series: 200a, 200b in phase 200/U; 300a, 300b in phase 300/V; and 400a, 400b in phase 400/W. Switches 200a, 300a and 400a are connected to the positive rail 105 (and may be referred to as the “upper” switches) and switches 200b, 300b and 400b are connected to the negative rail 107 (and may be referred to as the “lower” switches). In FIG. 1, each switch is an IGBT (insulated gate bipolar transistor) and, for each IGBT, an associated anti-parallel diode is also shown. However, any switches with fast switching capability may be used. A control system (such as a processor) (not shown) controls the switching of the switches 200a, 200b, 300a, 300b, 400a, 400b to control the AC output of the inverter 100.
A sinusoidal output current can be created at AC output 103 by a combination of switching states of the six switches. However, the inverter 100 must be controlled so that the two switches in the same phase are never switched on at the same time, so that the DC supply 101 is not short circuited. Thus, if 200a is on, 200b must be off and vice versa; if 300a is on, 300b must be off and vice versa; and if 400a is on, 400b must be off and vice versa. This results in eight possible switching vectors for the inverter, as shown in Table 1. In Table 1, the vector values are the states of the three upper switches 200a, 300a, 400a, with the three lower switches 200b, 300b, 400b necessarily taking the opposite state to avoid shorting out the DC supply.
TABLE 1Vector200a 300a400a200b300b400b VUWVWVVVUV0 = {000}OFFOFFOFF ONONON000ZeroV1 = {100}ONOFFOFF OFFONON+Vdc0−VdcActiveV2 = {110}ONONOFF OFFOFFON0+Vdc−VdcActiveV3 = {010}OFFONOFF ONOFFON−Vdc+Vdc0ActiveV4 = {011}OFFONONONOFFOFF−Vdc0+VdcActiveV5 = {001}OFFOFFONONONOFF0−Vdc+VdcActiveV6 ={101}ONOFFONOFFONOFF+Vdc−Vdc0ActiveV7 = {111}ONONONOFFOFFOFF000Zero
FIG. 2 shows the six active vectors and the two zero voltage vectors of Table 1 graphically portrayed in an inverter voltage switching hexagon. Such vectorial representation of three-phase systems is well known to the skilled person and will not be described in detail. However, in general, any three-phase system can be represented uniquely by a rotating vector VS, as shown in FIG. 2. The rotating vector VS comprises components of the six active vectors shown in Table 1 and FIG. 2. This is known as Space Vector Modulation (SWM). The voltage at the AC output 103 can be changed by varying the ratio between the zero voltage vectors V0 and V7 and the active vector VS (comprising components of V1 to V6) (the modulation index) by pulse width modulation (PWM) techniques.
FIG. 3 shows an example of pulse width space vector modulation over two switching periods according to the prior art. The switching function for each upper switch 200a, 300a, 400a is a time waveform taking the value 1 when the upper switch is on and 0 when the upper switch is off (as will be appreciated, the switching function for each lower switch 200b, 300b, 400b will be the inverse of the corresponding upper switch) with dead-time included to prevent short circuiting. Thus a low represents the lower switch for the phase (e.g 200b, 300b, 400b) being ON and a high represents the upper switch for the phase (e.g 200a, 300a, 400a) being ON (neglecting dead-time protection). Referring to FIG. 3, during the first period t_0, all three upper switches 200a, 300a, 400a are off (value 0) which produces vector V0 of Table 1. V0 is a zero voltage vector, so this time period t_0 is an inactive period. In the second period t_1, switch 200a takes the value 1 and switches 300a and 400a take the value 0, which produces vector V1, which is an active vector. In the third period t_2, switches 200a and 300a take the value 1 and switch 400a takes the value 0, which produces vector V2, which is also an active vector. Finally, during the fourth period t_3, all three upper switches 200a, 300a, 400a are on (value 1) which produces zero voltage vector V7 of Table 1. Thus, the active periods are t_1 and t_2 and the inactive period ti is t_0 and t_3. The ratio between the total active period (in this case, t_1+t_2) and total inactive period (in this case, t_0+t_3=ti) determines the output voltage at the AC output. FIG. 3 shows a 50% duty cycle (i.e. 50% active) as an example. Other duty cycles may be operative.
FIG. 3 shows a typical space vector modulation (SVM) timing pattern for two PWM periods, with symmetric switching (i.e. t_0=t_3). The ratio of t_0 and t_3 as shown in FIG. 3 is one to one.
FIG. 4 shows D and Q axis components of the desired output voltage for two output wave cycles versus output voltage angle. FIG. 5 shows D and Q axis components of the desired output voltage as plotted on the X and Y axis.
FIG. 6 shows phase voltages (with respect to the 0V line shown in FIG. 1, which is half of the dc bus) with symmetric switching (t_0=t_3) versus output voltage angle (with a Dc bus of 250V and a 200VII peak demand). FIG. 7 shows the resulting line to line voltage as seen by the motor load.
At low output frequencies (such as output frequencies less than around 1 Hz) the temperature of each individual switch 200a, 200b, 300a, 300b, 400a, 400b can become excessive even if the current delivered by the drive is less than the inverter rated output current as each individual switch may be on for a period of time sufficient to cause excessive temperature of the switch.
Because of this, and other, problems, the control of switching power converters is an area of increasing interest.
It is an object of the described technique to provide an improved method and control system for a power converter.